---
title: "Google reportedly taps AMD to co-design next-gen TPU"
url: https://www.parallelquant.com/posts/google-reportedly-taps-amd-to-co-design-next-gen-tpu-04c8f3
source_name: "Tom's Hardware"
source_url: https://www.tomshardware.com/tech-industry/artificial-intelligence/google-reportedly-taps-amd-to-design-next-generation-tpu-hybrid-ai-asic-could-integrate-on-package-cpu-cores-for-reinforcement-learning
published: 2026-08-16T12:40:00.000Z
topics: ["chips"]
publisher: "Parallel Quant"
---

# Google reportedly taps AMD to co-design next-gen TPU

*2026-08-16 · Source: [Tom's Hardware](https://www.tomshardware.com/tech-industry/artificial-intelligence/google-reportedly-taps-amd-to-design-next-generation-tpu-hybrid-ai-asic-could-integrate-on-package-cpu-cores-for-reinforcement-learning)*

Tom's Hardware reports Google may be working with AMD on its next-generation TPU, potentially integrating on-package CPU cores aimed at agentic and reinforcement-learning workloads. The report is based on a rumor, not an official announcement.

**Why it matters:** If confirmed, this would mark a shift in Google's TPU supply chain, which has historically leaned on Broadcom, and signals custom AI silicon increasingly being tailored for RL and agentic training rather than pure LLM inference. It reflects a broader trend of chipmakers building workload-specific silicon as agentic compute needs diverge from transformer inference.

**Topics:** chips

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Read the original: https://www.tomshardware.com/tech-industry/artificial-intelligence/google-reportedly-taps-amd-to-design-next-generation-tpu-hybrid-ai-asic-could-integrate-on-package-cpu-cores-for-reinforcement-learning
Canonical: https://www.parallelquant.com/posts/google-reportedly-taps-amd-to-co-design-next-gen-tpu-04c8f3
Published by Parallel Quant — https://www.parallelquant.com